| Name | Affliation | Title |
|
| Antonio A. Bruto da Costa | IIT Kharagpur | Feature based abstractions and Support Function Reachability for Hybrid
Automata |
| Kunal Banerjee | IIT Kharagpur | Translation Validation using Path Based Equivalence Checkers Augmented
with SMT Solvers
|
| A Baskar | BITS Goa | Quantitative Information Flow Problems |
| Dipak Chaudhari | IIT Bombay | Automated Theorem Prover Assisted Program Calculations |
| Pallab Dasgupta | IIT Kharagpur | Embedded Control Scheduling: An Automata and Language Theoretic Perspective |
| Soumyajit Dey | IIT Kharagpur | Reliability Analysis for Unreliable Embedded Systems |
| Shibashis Guha | IIT Delhi | Timed bisimilarity through model checking and other problems |
| Aritra Hazra | IIT Kharagpur | Formal Methods for Architectural Power Intent Verification |
| Nehul Jain | IIT Bombay | Games and Realizability |
| Astrid Kiehn | IIIT Delhi | Snapshot Algorithms for Mobile Computing Environment |
| Raveendra Kumar | IISc, Bangalore | Static Analysis and Verification of File-Processing Programs using File Format Specifications |
| Kamal Lodaya | IMSc | Automata from Left and Right |
| Kumar Madhukar | TRDDC, Pune | Sympara: Formally Verifying Synchronous Reactive Systems |
| Debdeep Mukhopadhyay | IIT Kharagpur | Cache Attacks on Symmetric Key Crypto-systems and their Formal Analysis |
| Madhavan Mukund | CMI | Formal specification of eventually consistent data structures |
| Rajarshi Ray | NIT Meghalaya | ASAC - Automatic Sensitivity Analysis for Approximate Computing |
| Suchismita Roy | NIT Durgapur | SAT based Techniques for Routing in FPGAs |
| Nishant Sinha | IBM | Good Error Explanations = Minimal Proofs |
| B Srivathsan | CMI | Timed and Counter Systems |
| R Venkatesh | TRDDC, Pune | From Invariant Checking to Invariant Inference Using Randomized Search |