Tuesday, 12 July 2011
14:00-15:00Madhavan Mukund, CMIThe decidability frontier for Petri Nets
15:30-16:30M Praveen, IMScModel-checking finite and infinite state systems
16:30-17:15S Krishna, IIT BombayConstruction of Signal Automata for MTL[U,S]
19:30-21:00Workshop Dinner

Wednesday, 13 July 2011
09:30-10:30Swarup Mohalik, GMVerification of end-to-end Latency in embedded systems
10:30-11:00Kumar Madhukar, TRDDCdL and KeYmaera : Towards Verification of Hybrid Systems
11:30-12:30Supratik Chakraborty/Abhishek Sankaran, IIT BombaySyntax vs Semantics in First-order Logic: Los Tarski Theorem and its Variants for Finite Structures
14:00-14:30Prateek Karandikar, CMICutting through regular post embedding problems
14:30-15:00Prakash Saivasan, CMIGames on Multipushdown Systems
15:30-16:00A V Sreejith, IMScDecidability of Presburger arithmetic
16:00-16:30Ramchandra Phawade, IMScKleene theorems for product systems
16:30-17:00Ravindra Metta, TRDDCStatecharts: Specification, Verification environments and limitations

Thursday, 14 July 2011
09:30-10:00Raj Mohan Matteplackel, IIScAn inductive construction for monitoring automaton for LTL
10:00-11:00Paritosh Pandya, TIFRFormal Analysis of Synchronous LSC specifications using logic CTL[DC]
11:30-12:00K R Raghavendra, IIScInformation-theoretic measures and Program security
12:00-13:00S P Suresh, CMIAuthorization logics: logical issues